The general structures and manufacturing processes for electronic packages are described in, for example, Donald P. Seraphim, Ronald Lasky, and Che-Yo Li, Principles of Electronic Packaging, McGraw-Hill Book Company, New York, N.Y., (1988), and Rao R. Tummala and Eugene J. Rymaszewski, Microelectronic Packaging Handbook, Van Nostrand Reinhold, New York, N.Y. (1988), both of which are hereby incorporated herein by reference.
As described by Seraphim et al., and Tummala et al., an electronic circuit contains many individual electronic circuit components, e.g., thousands or even millions of individual resistors, capacitors, inductors, diodes, and transistors. These individual circuit components are interconnected to form the circuits, and the individual circuits are further interconnected to form functional units. Power and signal distribution are done through these interconnections. The individual functional units require mechanical support and structural protection. The circuits require electrical energy to function, and the removal of thermal energy to remain functional. Microelectronic packages, such as, chips, modules, circuit cards, circuit boards, and combinations thereof, are used to protect, house, cool, and interconnect circuit components and circuits.
Within a single integrated circuit, circuit component to circuit component and circuit to circuit interconnection, heat dissipation, and mechanical protection are provided by an integrated circuit chip. This chip is referred to as the "zeroth" level of packaging, while the chip enclosed within its module is referred to as the first level of packaging.
There is at least one further level of packaging. The second level of packaging is the circuit card. A circuit card performs at least four functions. First, the circuit card is employed because the total required circuit or bit count to perform a desired function exceeds the bit count of the first level package, i.e., the chip. Second, the circuit card provides for signal interconnection with other circuit elements. Third, the second level package, i.e., the circuit card, provides a site for components that are not readily integrated into the first level package, i.e., the chip or module. These components include, e.g., capacitors, precision resistors, inductors, electromechanical switches, optical couplers, and the like. Fourth, the second level package provides for thermal management, i.e., heat dissipation.
There is frequently a third level of packaging. This is the "board." The board carries both first and second level packages.
Packages may be characterized by the material used as the dielectric, i.e., as ceramic packages or as polymeric packages. The basic process for polymer based composite package fabrication is described by George P. Schmitt, Bernd K. Appelt and Jeffrey T. Gotro, "Polymers and Polymer Based Composites for Electronic Applications" in Seraphim, Lasky, and Li, Principles of Electronic Packaging, pages 334-371, previously incorporated herein by reference, and by Donald P. Seraphim, Donald E. Barr, William T. Chen, George P. Schmitt, and Rao R. Tummala, "Printed Circuit Board Packaging" in Tummala and Rymaszewski, Microelectronics Packaging Handbook, pages 853-922, also previously incorporated herein by reference.
In the normal process for package fabrication a fibrous body, such as a non-woven mat or woven web, is impregnated with a resin. This step includes coating the fibrous body with, for example, an epoxy resin solution, evaporating the solvents associated with the resin, and partially curing the resin. The partially cured resin is called a B-stage resin. The body of fibrous material and B stage resin is called a prepreg. The prepreg, which is easily handled and stable, may be cut into sheets for subsequent processing.
Typical resins used to form the prepreg include epoxy resins, cyanate ester resins, polyimides, hydrocarbon based resins, and fluoropolymers. One epoxy prepreg is the FR-4 prepreg. FR-4 is a fire retardant epoxy-glass cloth material, where the epoxy resin is the diglycidyl ether of 2,2'- bis(4-hydroxyphenyl) propane. This epoxy resin is also known as the diglycidyl ether of bisphenol-A, (DGEBA). The fire retardancy of the FR-4 prepreg is obtained by including approximately 15-20 weight percent bromine in the resin. This is done by partially substituting brominated DGEBA for the DGEBA.
Other epoxy resin formulations useful in providing prepregs include high functionality resins, such as epoxidized cresol novolacs, and epoxidized derivatives of triphenyl methane. The multifunctional epoxy resins are characterized by high glass transition temperatures, high thermal stability, and reduced moisture take up.
Still other epoxy resins are phenolic cured epoxies, as Ciba-Giegy RD86-170.TM., Ciba-Giegy RD87-211.TM., Ciba-Giegy RD87-212.TM., Dow Quatrex.RTM. 5010.TM., Shell Epon.RTM., and the like. These epoxies are mixtures of epoxies, with each epoxy having a functionality of at least 2, a phenolic curing agent with a functionality of at least 2, and an imidazole catalyst.
Cyanate ester resins are also used in forming prepregs. One type of cyanate ester resin includes dicyanates mixed with methylene dianiline bis-maleimide. This product may be further blended with compatible epoxides to yield a laminate material. One such laminate material is a 50:45:5 (parts by weight) of epoxy: cyanate: maleimide. Typical of cyanate ester resins useful in forming prepregs is the product of bisphenol-A dicyanate and epoxy, which polymerizes during lamination to form a crosslinked structure.
A still further class of materials useful in forming prepregs for rigid multilayer boards are thermosetting polyimides. While thermosetting polyimides exhibit high water absorption, and high cost, they have good thermal properties and desirable mechanical properties. The preferred polyimides for prepreg use are addition products such as polyimides based on low molecular weight bismaleimides.
Subsequent processing of polymeric substrates includes circuitization, that is, the formation of a Cu signal pattern or power pattern on the prepreg, or lamination of the prepreg to a power core. Circuitization may be additive or subtractive.
The above described package configuration can be circuitized by additive circuitization. In additive circuitization a thin film of a "seeding" layer, such as a thin film of palladium, is first applied to the substrate. The adhesion layer may be applied by various methods, including, by way of example, deposition from a colloidal Pd/Sn solution.
Subsequently, photoresist is applied atop the palladium "seed" layer, imaged, and developed to provide a pattern for circuit deposition. Copper circuitization is then plated onto the "seed" layer between wall of the organic, hydrophobic photoresist to provide the circuitization pattern on the surface of the package. The remaining photoresist is then stripped, leaving a thick copper plated circuitization pattern atop the thin Pd seed layer, and a thin Pd seed layer "background."
The composite printed circuit package is fabricated by interleaving cores (including signal cores, signal/signal cores, power cores, power/power cores, and signal/power cores) with additional sheets of prepreg, and surface circuitization. Holes, as vias and through holes, may be drilled in individual core structures, for example, before or after circuitization, as described above, or in partially laminated modules.
U.S. Pat. No. 4,155,775 to Warren Alpaugh, Michael Canestaro and Theron Ellis for Cleaning of High Aspect Ratio Through Holes In Multilayer Printed Circuit Boards (IBM) describes a printed circuit board process with holes drilled through an epoxy-glass panel, followed by a cleaning process and an electroless copper plating process. Alpaugh et al. describe a cleaning process for high aspect ratio through holes of multilayer printed circuit boards to remove any loosened fibrous material, epoxy, and the like, and also provides an inverted "T" structure in the printed circuit board at the interplanes of the internal conductive circuits within the printed circuit board.
According to the process of Alpaugh et al. the drilled (and smeared) printed circuit board is subjected to the following process steps.
a. After drilling, the printed circuit board is vapor blasted, for example, with a high pressure blast of a particulate slurry in water.
b. Vapor blasting is followed by soaking the printed circuit board in a suitable solvent to swell smears on the circuit interplanes of the board. Exemplary solvents are N-methyl-2-pyrrolidone, N,N-dimethyl formamide, and dimethyl sulfoxide. Alpaugh et al. disclose that N-methyl-2-pyrrolidone is preferred.
c. The excess solvent is removed from the printed circuit board. This is accomplished by feeding, e.g., gravity feeding, 100% methylchloroform (1,1,1-trichloroethane, CCl.sub.3 -CH.sub.3). This is disclosed to be a four minute soak followed by a 90 second air blow. The air blow is a source of atmospheric methylchloroform, an ozone depleter.
d. A unilateral stream of a cleaning solution is fed through the printed circuit board holes to remove excess fibers and smear in the holes and produce an etchback of the conductors. An exemplary cleaning solution is chrome/sulfuric acid, for example 40%-50% H.sub.2 SO.sub.4, 50-80 grams/liter CrO.sub.3.
e. The cleaning solution is then rinsed off, reduced, and removed. Alpaugh et al. disclose that in this step the Cr.sup.+6 is reduced to Cr.sup.+3 by gravity feeding sodium bisulfite through the printed circuit board.
f. Alpaugh et al. further disclose that the printed circuit board is rinsed with (deionized) water and blown dry.
The methylchloroform rinse serves three purposes. First, it removes the solvent (e.g., N-methyl-2-pyrrolidone, N-dimethyl formamide, or dimethyl sulfoxide), which is incompatible with (1) the H.sub.2 SO.sub.4 /CrO.sub.3 desmearing bath, and, to a lesser extent, (2) the copper plating bath. Second, while the methylchloroform is, itself detrimental to the H.sub.2 SO.sub.4 /CrO.sub.3 desmearing bath, it is easily removed by air blasts. Third, absent the ozone depletion effect, methylchloroform is an ideal agent for removing the (N-methyl-2-pyrrolidone, N-dimethyl formamide, or dimethyl sulfoxide) solvent, since it does not plasticize the printed circuit board, and is neither explosive nor flammable.
To be noted is that methylchloroform (MCF) is a unique solvent that does not kill the swelling, is volatile, and is not flammable at the conditions of processing printed circuit boards. This combination of properties is unique to MCF among solvents.
Alternatives to methylchloroform are the low boiling solvents, e.g., methyl ethyl ketone (MEK) and isopropyl alcohol are flammable and explosive. Another low boiling solvent, methylene chloride (MC) is non-flammable, but toxic. High boiling solvents could not be easily removed, and would poison the H.sub.2 SO.sub.4 /CrO.sub.3 desmearing bath. Methylene chloride is not flammable, but is not as effective as methyl chloroform.
Thus, there is a need for an additive circuitization process which avoids the use of ozone depleting halohydrocarbons, flammable solvents, and contaminants that poison the copper solution. Preferably the process is compatible with present installed process equipment and presently utilized materials.